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What often looks like software errors in process equipment may actually be caused by an external static charge (or discharge) problem. An ESD event anywhere in a room can cause an EMI. That EMI can couple into a system through cables or open chassis and induce a noise voltage greater than the logic inputs’ indeterminate range and cause a single event upset. EMI effects to microprocessors or other circuit logic latch-ups in process equipment can manifest itself in a number of ways, such as random hangs, robotic malfunction, or software errors, all resulting in downtime and reduced throughput.
There are three well-known methods to simulate an ESD Event: the human body model, the machine model and the charge device model. Each has its place to aid in designing the proper ESD Control Program depending on the application.
Induced voltage from an EMI energy transfer to a logic input trace with typical area of 40 mm2 could be as high as 485 mV with an ESD-induced 100 MV/m field at 33 cm as depicted in Table II. 485 mV is enough voltage to flip a logic state of an ECL device as depicted in Table I. From the same ESD event, a data input cable with a receiving area of 40 cm2 can have an EMI-induced voltage of 4.85 which is enough voltage to drive a logic error in any family or subfamily of logic circuits; TTL, CMOS, & ECL.
Table II - EMI Energy Transfer from an ESD to an Isolated Conductor using antenna theory where: the area of the conductor is A=variable, the distance from the source is R=1/3 meter, ESD has a 1 ns rise time and a 3 ns pulse width.
An ESD event can have a fast rise time, especially for low voltage discharges . The waveform for an ESD event includes high-frequency components with a frequency range from DC to over 6 GHz, . This electromagnetic radiation (EM) can readily couple to circuit traces (conductors acting as antennae). For ungrounded conductors coupled within a capacitive circuit, this EM wave can induce a static charge, building until a discharge, breakdown, recombination, or neutralization occurs. High-speed circuits, by their nature, tend to be very susceptible to high-frequency signals such as those from a nearby ESD event.
The electrostatic field strength (Eo) just before an ESD is proportional to the charged voltage (V) at gap width d . The gap width, d , is defined by Paschen’s Law, but may vary in each discharge condition. The electric field strength Eo = V/d where V is from 0.5 kV to 30 kV and d is from 5 m m to 10 mm can yield an electric field strength as high as 6 GV/m. This extremely high field strength is attributed to a smaller gap width, d = 5 m m. It is important to note that the arc length of an ESD is of greater influence to its disturbance than its voltage .
An Electromagnetic Interference (EMI) is an unwanted electromagnetic energy, (whether intentionally or unintentionally generated), of almost any frequency and energy level. EMI is defined to exist when undesirable voltages or currents are present to adversely influence the performance of an electronic circuit or system. Sources of radiated electromagnetic energy from ESD are very common in today’s factories from furniture ESD, raised flooring ESD, Human Body ESD, hand held toolbox ESD and metal-to-metal ESD [3, 4, 6, 7]. An EMI, or summation of EMIs, can over time induce a charge (static voltage) on an ungrounded conductor coupled in a capacitive circuit, i.e., an isolated capacitor. An even more common occurrence is a single ESD induced EMI that can upset a logic circuit and cause systems errors. The very fast rise time of an ESD may be preserved if it flows through a metal conductor, resulting in radiated EMI.
Assume that all electronic devices are susceptible to damage or logic error states from ESD and EMI, respectively; and take the proper precautions.
Proper grounding of isolated conductors and use of ground-planes near active conductors will minimize some of these effects.
Shielding the known emitting devices will help, but it is the unknown emitters that will cause the most problems. Thus, shielding the receptors, sensitive logic devices, will help combat EMI-induced logic errors. Start shielding at the device level, for it is less costly than at the system level.
Reduce ground-loop areas between interconnected equipment and systems. Route interconnected cables inside conduit, cable trays or raceways when possible. Do not coil excess cable into a helix, but rather fold back and forth to foil antenna gains.
Metal-to-metal discharges will always derive the largest current derivatives (di/dt) and hence generate the strongest EMI fields. Treat isolated conductors as charged devices and ground them with an electrically dissipative material (R > 104 W ). This will slow down the energy transfer from the conducted ESD causing the resultant EMI to be negligible to any active near or far field system.
A high energy ESD can drive a substantial EMI energy to couple and charge passive circuits or energize active circuits with significant system problems. EMC practices involving shielding designs typically account for EMI from known sources, but should also consider unplanned sources such as ESD events in the near vicinity of the active or sensitive system(s).
With today’s logic devices having smaller noise margins and indeterminate ranges, susceptibility to ESD-induced EMI should be accounted for in the design and implementation of the systems incorporating logic circuits.
J. Silberberg, "What Can/Should We Learn from Reports of Medical Device Electromagnetic Interference?", FDA, Rockville, EMBC95 paper 10.2.1.3, http://funsan.biomed.mcgill.ca/~funnell/embc95_cd/texts/952.htm , 1995
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